Flip chip technology provides a method for connecting an integrated circuit (IC) die to a substrate within a package. In the flip chip method, a plurality of electrical terminals are formed on an active face of the die. A respective solder bump is formed on each of the electrical terminals. The substrate has a plurality of terminal pads corresponding to the terminals on the die. The die is “flipped,” so that the terminals of the device contact the pads of the substrate. Heat is applied to reflow the solder bumps, forming electrical and mechanical connections between the substrate and the active face of the die.
The flip chip package is very compact, and is also referred to a chip-scale package. The flip chip device poses design challenges, because a thermal mismatch between the die and the substrate may cause high die stress leading to a delamination failure. One method of reducing this problem is to cool the device by placing a heat spreader on the back (non-active) side of the die.
Both one piece and two piece heat spreaders are known in the art. U.S. Pat. No. 6,681,482 discloses several examples of single piece heat spreaders, and is fully incorporated herein by reference. The heat spreaders disclosed comprise thermally conductive material such as copper and multiple “legs” that are attached to the substrate to form a lid overlying the die to provide physical protection. The disclosed structures are open allowing easy flushing of a solvent for cleaning (open configuration). Prior art packages were sealed to prevent materials from entering and effecting the ICs during operation. If pinholes were present in the prior art sealed packages, any material penetrating the package could not be easily removed, thus reducing the operational lifetime of the IC. However, the disclosed structure of U.S. Pat. No. 6,681,482 does not achieve the operational life time of an IC effectively sealed (pinhole free) against the penetration of moisture in a high humidity environment.
FIG. 1 shows a cross-sectional view of a prior art example of a flip-chip package comprising a substrate 5, a die 10, an underfill material 15, a shaped one piece heat spreader 20, and a thermally conductive adhesive layer 25 between the heat spreader 20 and the die's non-active surface 30. FIG. 1 also shows an adhesive layer 35 attaching the one piece heat spreader 20 to the substrate 5.
FIG. 2 shows a cross-sectional view of a prior art example of a flip-chip package comprising a substrate 5, a die 10, and underfill material 15, a flat heat spreader 40, and a thermally conductive adhesive layer 25 between the heat spreader 40 and the die's non-active surface 30. The heat spreader 40 is attached to the substrate 5 by an intermediary insert 45. The heat spreader 40 is adhered to the insert 45 by an adhesive layer 47. Alternatively, if the insert 45 is made of an appropriate material it can be preattached to the heat spreader 40 by standard procedures which include welding, brazing or soldering. The insert is also attached to the substrate by an adhesive layer 50.
U.S. Pat. No. 6,411,507 discloses that Integrated circuit packages are very moisture sensitive. Extended exposure to humidity from the air may allow moisture to seep into the packages and damage them. For example, moisture seeping underneath a protective overcoat (PO) of an integrated circuit will cause the PO to delaminate. Therefore, it is desirable to encase integrated circuit dies in hermetically sealed packages, to protect them from moisture. These “closed cap” packages also protect integrated circuit dies from damage due to physical stress during assembly and testing.
Although prior art heat spreaders provide physical protection to the die during handling, they were not designed to provide protection against die stress and control of warpage of the die/substrate/heat spreader package.
Additionally, in chip-scale packages having a relatively large die and relatively small substrate, attachment of the heat spreader to the substrate may not be feasible. There may not be enough physical space between the end of the substrate and the underfill to allow even the designs in U.S. Pat. No. 6,681,482 to be attached with sufficient strength to provide physical protection to the die. Therefore, the selection of die size and substrate size is limited by this practical consideration. An improved package configuration is desired.